# fpga.chat full AI context

## Summary

fpga.chat pre-v1 is an EDA Error Decoder and FPGA debugging assistant with structured reports, redaction-oriented intake and product feedback loops. Build is an alpha visual constructor, and Market is a GitHub-hosted core catalog with creator submissions, license review and paid Build usage ledger before automated payouts.

Status: Private Alpha — Under Construction.

The current hosted pre-v1 milestone is EDA Error Decoder for FPGA tool logs from Vivado, Quartus, Gowin EDA, Yosys and Verilator. Build is an alpha visual constructor. Market is a GitHub-hosted core catalog and creator submission queue; paid usage is ledgered only after reviewed paid core use in paid Build workflows, and direct checkout is not enabled.

## Public landing copy

H1: fpga.chat: EDA Error Decoder and FPGA debugging assistant.

Subtitle: fpga.chat helps you turn FPGA/EDA logs into structured reports with evidence lines, likely cause, fixes, verification steps and limitations.

Status: Private Alpha · Under Construction.

Core message: Available now: EDA Error Decoder, report viewer, feedback delivery and redaction. Experimental: project upload, local connector, OSS tool inventory, Build visual constructor and Market catalog, creator submission flow and paid Build usage ledger. Planned: broader online FPGA device constructor workflows.

## Pre-v1 availability

### Available now

- EDA Error Decoder.
- Structured report viewer.
- Email/admin feedback delivery.
- Redaction controls.

Every future engineering answer/report should expose:

- confidence;
- evidence;
- sources;
- tool_results;
- warnings;
- limitations;
- repro_steps;
- next_actions.

### Experimental

- Project upload.
- Local connector.
- OSS/backend tool inventory.
- Build visual constructor.
- Free/open Market catalog and authenticated core submission.
- Private alpha CI/API integration.

### Planned

- Online FPGA Device Constructor.
- Board/component selection workflows.
- BOM and cost estimates.
- Assembly guides.
- AccelFury af compatibility review workflow.

## Workflows

AI Assistant workflow:

1. Paste log or upload project.
2. Redaction.
3. Tool/stage/error detection.
4. Evidence retrieval.
5. Diagnosis.
6. Structured report.
7. Next command / CI export.

Planned Device Constructor workflow:

1. Describe device.
2. Select use case.
3. Choose board/chip.
4. Add IP cores.
5. Add interfaces and peripherals.
6. Estimate cost.
7. Generate BOM.
8. Generate assembly guide.
9. Export project brief.

## Example device concepts

- Offline voice assistant front-end: PDM microphones, PDM-to-PCM, I2S/TDM, wake-word preprocessor, hardware mute, Home Assistant bridge.
- Audio processing FPGA module: microphone input, CIC/FIR filters, sample-rate conversion, DMA streamer, AXI-Stream bridge.
- Industrial sensor acquisition board: ADC interface, SPI/I2C, timestamping, buffering, Ethernet/USB output.
- Protocol bridge: UART/SPI/I2C/CAN/Ethernet, FIFO, clock-domain crossing, register map, firmware interface.
- Educational FPGA kit: selected beginner board, LED/buttons, UART, optional VGA/HDMI if feasible, starter labs, build instructions.

Estimated cost range should be calculated only when the constructor has a reviewed component database. Cost estimates are non-binding estimates.

## Trust and limitations

- LLM is not the source of truth.
- No unsourced pinout generation.
- No timing signoff claims.
- No CDC/RDC signoff claims.
- Vendor tools are not run in public cloud by default.
- User uploads are not used for model training by default.
- Generated HDL, constraints and testbenches are drafts unless verified by tool output.
- Device cost estimates are estimates, not binding quotations.
- Final hardware must be reviewed by a qualified engineer before manufacturing or sale.

## Roadmap

AI Assistant roadmap:

- Now: landing page, EDA Error Decoder design, seed error corpus and manual private alpha onboarding.
- Next: log parser MVP, structured report viewer, RAG corpus, API, CI/IDE prototypes.
- Later: Project Doctor, testbench generator, local vendor connector, private corpus, enterprise/on-prem.

Device Constructor roadmap:

- Now: concept page, device workflow design, first component taxonomy.
- Next: board/component catalog, IP core catalog, free/open and paid source-available Market review workflow, BOM and cost model, device configurator UI, exportable build guide.
- Later: compatibility moderation expansion, AccelFury af manifest review, manufacturing-readiness checklist.

Market workflow:

1. Browse free/open and paid source-available cores.
2. Open a core detail page.
3. Review license, language, top module, interfaces, sources and limitations.
4. Submit a repository with license, manifest path, verification notes and AccelFury af metadata when available.
5. Wait for moderation before any catalog or Build promotion.

## API overview

The pre-v1 public API is available for private-alpha EDA Error Decoder workflows. The intended output shape is structured, machine-readable reports rather than unconstrained chat text. Report fields include confidence, evidence, sources, tool_results, warnings, limitations, repro_steps and next_actions.

## Important URLs

- Landing: https://fpga.chat/
- Error Decoder app: https://fpga.chat/app/decoder
- Docs hub: https://fpga.chat/docs
- Build visual constructor: https://fpga.chat/build
- Market catalog: https://fpga.chat/market
- Market submission: https://fpga.chat/market/submit
- Human overview: https://fpga.chat/docs/overview
- Human assistant contract: https://fpga.chat/docs/assistant
- Human API contract: https://fpga.chat/docs/api
- Human security stance: https://fpga.chat/docs/security
- Human limitations: https://fpga.chat/docs/limitations
- Human roadmap: https://fpga.chat/docs/roadmap
- Human constructor scope: https://fpga.chat/docs/constructor
- Human Market compatibility: https://fpga.chat/docs/market
- Human Telegram bot boundary: https://fpga.chat/docs/telegram-bot
- Assistant section: https://fpga.chat/#assistant
- Planned constructor roadmap: https://fpga.chat/#roadmap
- Technical overview: https://fpga.chat/docs/overview.md
- Assistant docs: https://fpga.chat/docs/assistant.md
- Constructor docs: https://fpga.chat/docs/constructor.md
- Market docs: https://fpga.chat/docs/market.md
- Roadmap: https://fpga.chat/docs/roadmap.md
- Limitations: https://fpga.chat/docs/limitations.md
- Bot boundary: https://fpga.chat/docs/telegram-bot.md
- Product manifest: https://fpga.chat/product.json
- Concise AI context: https://fpga.chat/llms.txt
- Contact: mailto:help@fpga.camp?subject=fpga.chat%20contact

- Market license guide: https://fpga.chat/market/licenses
- Market creator dashboard: https://fpga.chat/market/creator